收藏本站
DS1258W
READ MODE
The DS1258W executes a read cycle whenever WE (Write Enable) is inactive (high) and either/both of
CEU or CEL (Chip Enables) are active (low) and OE (Output Enable)is active (low). The unique address
specified by the 17 address inputs (A0-A16) defines which of the 131,072 words of data is accessed. The
status of CEU and CEL determines whether all or part of the addressed word is accessed. If CEU is active
with CEL inactive, then only the upper byte of the addressed word is accessed. If CEU is inactive with
CEL active, then only the lower byte of the addressed word is accessed. If both the CEU and CEL inputs
are active (low), then the entire 16-bit word is accessed. Valid data will be available to the 16 data output
drivers within t ACC (Access Time) after the last address input signal is stable, providing that CEU , CEL
and OE access times are also satisfied. If CEU , CEL , and OE access times are not satisfied, then data
access must be measured from the later-occurring signal, and the limiting parameter is either t CO for CEU ,
CEL , or t OE for OE rather than address access.
WRITE MODE
The DS1258W executes a write cycle whenever WE and either/both of CEU or CEL are active (low)
after address inputs are stable. The unique address specified by the 17 address inputs (A0-A16) defines
which of the 131,072 words of data is accessed. The status of CEU and CEL determines whether all or
part of the addressed word is accessed. If CEU is active with CEL inactive, then only the upper byte of
the addressed word is accessed. If CEU is inactive with CEL active, then only the lower byte of the
addressed word is accessed. If both the CEU and CEL inputs are active (low), then the entire 16-bit word
is accessed. The write cycle is terminated by the earlier rising edge of CEU and/or CEL , or WE . All
address inputs must be kept valid throughout the write cycle. WE must return to the high state for a
minimum recovery time (t WR ) before another cycle can be initiated. The OE control signal should be kept
inactive (high) during write cycles to avoid bus contention. However, if the output drivers are enabled
( CEU and/or CEL , and OE active) then WE will disable the outputs in t ODW from its falling edge.
READ/WRITE FUNCTION Table 1
OE
H
L
L
L
X
X
X
X
WE
H
H
H
H
L
L
L
X
CEL
X
L
L
H
L
L
H
H
CEU
X
L
H
L
L
H
L
H
V CC
CURRENT
I CCO
I CCO
I CCO
I CCS
DQ0-DQ7
High-Z
Output
Output
High-Z
Input
Input
High-Z
High-Z
DQ8-DQ15
High-Z
Output
High-Z
Output
Input
High-Z
Input
High-Z
CYCLE
PERFORMED
Output Disabled
Read Cycle
Write Cycle
Output Disabled
DATA RETENTION MODE
The DS1258W provides full functional capability for V CC greater than 3.0V, and write-protects by 2.8V.
Data is maintained in the absence of V CC without any additional support circuitry. The nonvolatile static
RAMs constantly monitor V CC . Should the supply voltage decay, the NV SRAMs automatically write-
protect themselves, all inputs become “don’t care,” and all outputs become high impedance. As V CC falls
below approximately 2.5V, a power-switching circuit connects the lithium energy source to RAM to
retain data. During power-up, when V CC rises above approximately 2.5V, the power switching circuit
2 of 9
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
DS1258Y-100# IC NVSRAM 2MBIT 100NS 40DIP
DS1265AB-70IND+ IC NVSRAM 8MBIT 70NS 36DIP
DS1270W-100IND# IC NVSRAM 16MBIT 100NS 36DIP
DS1270W-100IND IC NVSRAM 16MBIT 100NS 36DIP
DS1270Y-70IND# IC NVSRAM 16MBIT 70NS 36DIP
DS1330WP-100IND+ IC NVSRAM 256KBIT 100NS 34PCM
DS1330YP-70IND+ IC NVSRAM 256KBIT 70NS 34PCM
DS1345WP-100IND+ IC NVSRAM 1MBIT 100NS 34PCM
相关代理商/技术参数
DS1258W-100IND 功能描述:NVRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube
DS1258W-100-IND 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:3.3V 128k x 16 Nonvolatile
DS1258W-100IND# 功能描述:NVRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube
DS1258W-150 功能描述:NVRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube
DS1258W-150# 功能描述:NVRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube
DS1258W-150-IND 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:3.3V 128k x 16 Nonvolatile
DS1258WP-100 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:3.3V 128k x 16 Nonvolatile
DS1258WP-100-IND 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:3.3V 128k x 16 Nonvolatile